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15 mhz rail - to - rail operational amplifiers data sheet op162 / op262 / op462 rev. h document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications sub ject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, no rwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 ? 2013 analog devices, inc. all rights reserved. technical support www.analog.com features wide bandwidth: 15 mhz low offset voltage: 325 v max low noise: 9.5 nv / hz @ 1 khz single - supply op eration: 2.7 v to 12 v rail - to - rail output swing low tcv os : 1 v / c typ high slew rate: 13 v/ s no phase inversion unity - gain stable applications portable instrumentation sampling adc amplifier wireless lans direct access arrangement office automation general description t he op162 (single), op262 (dual), and op462 (quad) rail - to - rail 15 mhz amplifiers feature the extra speed new designs require, with the benefits of precision and low power operation. with their incredibly low offset voltage of 45 v (typ ical ) and low noise, they are perfectly suited for precision filter applica - tions and instrumentation. the low supply current of 500 a (typ ical ) is critical for portable or densely packe d designs. in addition, the rail - to - rail output swing provides greater dynamic range and control than s tandard video amp lifiers . these products operate from sing le supplies as low as 2.7 v to dual supplies of 6 v. the fast settling times and wide output swings recommend them for buffers to sampling a/d converters . the output drive of 30 ma (sink and source) is needed for m any audio and display applications; more output current can be supplied for limited durations. the op x 62 family is specified over the extended industrial temperature range ( C 40 c to +125 c ). the single op162 amplifiers are available in 8 - lead soic package. the dual op262 amplifiers are available in 8 - lead soic and tssop packages. the quad op462 amplifiers are available in 14 - lead , narrow - body soic and tssop packages. pin configurations figure 1. 8 - lead narrow - body soic (s suffix) figure 2. 8 - lead tssop (ru suffix) and 8- lead narrow - body soic (s suffix) figure 3. 14 - lead narrow - body soic (s suffix) and 14 - lead tssop (ru suffix) null 1 ? in a 2 +in a 3 v ? 4 null 8 v+ 7 out a 6 nc 5 nc = no connect op162 top view (not to scale) 00288-001 top view (not to scale) 1 2 3 4 op262 ?in a +in a v? out a 8 7 6 5 out b ?in b +in b v+ 00288-004 1 2 3 4 5 6 7 op462 ?in a +in a v+ out b ?in b +in b out a 14 1 3 1 2 1 1 1 0 9 8 ?in d +in d v? out c ?in c +in c out d top view (not to scale) 00288-006
op162/op262/op462 data sheet rev. h | page 2 of 20 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 general descript ion ......................................................................... 1 pin configurations ........................................................................... 1 revision history ............................................................................... 2 specificatio ns ..................................................................................... 3 absolute maximum ratings ............................................................ 6 esd caution .................................................................................. 6 typical performance characteristics ............................................. 7 applications ..................................................................................... 12 functional description .............................................................. 12 offset adjustment ...................................................................... 12 rail - to - rail output .................................................................... 12 output s hort - circuit protection .............................................. 12 input overvoltage protection ................................................... 13 output phase reversal ............................................................... 13 power dissipation ....................................................................... 13 unused amp lifiers ..................................................................... 14 power - on settling time ............................................................ 14 capacitive load drive ............................................................... 14 total harmonic distortion and crosstalk .............................. 15 pcb layout considerations ...................................................... 15 applications circuits ...................................................................... 16 single - supply stereo headphone driver ................................. 16 instrumentation amplifier ........................................................ 16 di rect access arrangement ...................................................... 17 outline dimensions ....................................................................... 18 ordering guide .......................................................................... 20 revision history 4 /1 3 rev. g to rev. h combined figure 2 and figure 3 ; combined figure 4 and figure 5 .............................................................................................. 1 changes to figure 12 ........................................................................ 9 5/12 rev. f to rev. g deleted msop throughout ............................................................ 1 deleted figure 2 ; renumbered sequentially ................................. 1 deleted spice - macro model section ............................................ 1 8 updated outline dimensions ....................................................... 18 changes to ordering guide .......................................................... 20 1/05 rev. e to rev. f changes to absolute maximum ratings table 4 and table 5 .... 6 change to figure 36 ....................................................................... 13 changes to ordering guide .......................................................... 20 12/04 rev. d to rev. e updated format .................................................................. univers al changes to general description ..................................................... 1 changes to specifications ................................................................. 3 changes to package type ................................................................. 6 change to figure 16 .......................................................................... 8 change to figure 22 .......................................................................... 9 change to figure 36 ....................................................................... 13 change to figure 37 ....................................................................... 14 changes to ordering guide .......................................................... 20 10/02 rev. c to rev. d deleted 8 - lead plastic d ip (n - 8 ) .................................... universal deleted 14 - lead plastic dip (n - 14) ................................ universal edits to o rdering guide ....................................................... 19 edits to figure 30 ............................................................................ 19 edits to figure 31 ............................................................................ 19 updated outline dimensions ....................................................... 19
data sheet op162/ op262/op462 rev. h | page 3 of 20 specifications @ v s = 5.0 v, v cm = 0 v, t a = 25 c, unless otherwise noted. table 1 . electrical characteristics parameter symbol conditions min typ max unit input characteristics offset voltage v os op162g, op262g, op462g 45 325 v C 40 c t a +1 25 c 800 v h grade, C 40 c t a +125 c 1 mv d g rade 0.8 3 mv C 40 c t a +125 c 5 mv input bias current i b 360 600 na C 40 c t a +12 5 c 650 na input offset current i os 2.5 25 na C 40 c t a +125 c 40 na input voltage range v cm 0 4 v common - mode rejection cmrr 0 v v cm 4.0 v, C 40 c t a +125 c 70 110 db large signal voltage gain a vo r l = 2 k , 0.5 v out 4.5 v 30 v/mv r l = 10 k , 0.5 v out 4.5 v 65 88 v/mv r l = 10 k , C 40 c t a + 125 c 40 v/mv long - term offset voltage 1 v os g g rade 600 v offset voltage drift 2 ? v os / ? t 1 v/ c bias current drift ? i b / ? t 250 pa / c output characteristics output voltage swing high v oh i l = 250 a, C 40 c t a +125 c 4.95 4.99 v i l = 5 ma 4.85 4.94 v output voltage swing low v ol i l = 250 a, C 40 c t a + 125 c 14 50 mv i l = 5 ma 65 150 mv short - circuit current i sc short to g round 80 ma maximum output current i out 3 0 ma power supply power supply rejection ratio psrr v s = 2.7 v to 7 v 120 db C 40 c t a + 125 c 90 db supply current/amplifier i sy op162 , v out = 2.5 v 600 750 a C 40 c t a + 125 c 1 ma op262, op462, v out = 2.5 v 500 700 a C 40 c t a + 125 c 850 a dynamic performance slew rate sr 1 v < v out < 4 v, r l = 10 k 10 v/ s settling time t s to 0.1% , a v = C 1, v o = 2 v s tep 540 ns gain bandwidth product gbp 15 mhz phase margin m 61 degrees noise performance voltage noise e n p -p 0.1 hz to 10 hz 0.5 v p -p voltage noise density e n f = 1 khz 9.5 nv / hz current noise density i n f = 1 khz 0.4 pa / hz 1 long - term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at 125 c, with an ltpd of 1.3. 2 offset voltage drift is the average of the ?40 c to +25 c delta and the +25 c to +125 c delta.
op162/op262/op462 data sheet rev. h | page 4 of 20 @ v s = 3.0 v, v cm = 0 v, t a = 25 c, unless otherwise noted . table 2 . electrical characteristics parameter symbol conditions min typ max unit input characteristics offset voltage v os op162g, op262g, op462g 50 325 v g, h grades, C 40 c t a +125 c 1 mv d grade 0.8 3 mv C 40 c t a +125 c 5 mv input bias current i b 360 600 na input offset current i os 2.5 25 na input voltage range v cm 0 2 v common - mode rejection cmrr 0 v v cm 2.0 v, C 40 c t a +125 c 70 110 db large signal voltage gain a vo r l = 2 k , 0.5 v v out 2.5 v 20 v/mv r l = 10 k , 0.5 v v out 2.5 v 20 30 v/mv long - term offset voltage 1 v os g g rade 600 v output characteristics output voltage swing high v oh i l = 250 a 2.95 2.99 v i l = 5 ma 2.85 2.93 v output voltage swing low v ol i l = 250 a 14 50 mv i l = 5 ma 66 150 mv power supply power supply rejection ratio psrr v s = 2.7 v to 7 v, C 40 c t a +125 c 60 110 db supply current/amplifier i sy op162, v out = 1.5 v 600 700 a C 40 c t a +125 c 1 ma op262, op462, v out = 1.5 v 500 650 a C 40 c t a +125 c 850 a dynamic performance slew rate sr r l = 10 k 10 v/ s settling time t s to 0.1%, a v = C 1, v o = 2 v s tep 575 ns gain bandwidth product gbp 15 mhz phase margin m 59 degrees noise performance voltage noise e n p -p 0.1 hz to 10 hz 0.5 v p -p voltage noise density e n f = 1 khz 9.5 nv/ hz current noise density i n f = 1 khz 0.4 pa / hz 1 long - term offset voltage is guaranteed by a 1000 hour life test performe d on three independent lots at 125 c , wit h an ltpd of 1.3.
data sheet op162/ op262/op462 rev. h | page 5 of 20 @ v s = 5.0 v, v cm = 0 v, t a = 25 c, unless otherwise noted. table 3 . electrical characteristics parameter symbol conditions min typ max unit input characteristics offset voltage v os op162g, op262g, op462g 25 325 v ? 40 c t a +125 c 800 v h grade, C 40 c t a +125 c 1 mv d g rade 0.8 3 mv ? 40 c t a +125 c 5 mv input bias current i b 260 500 na ? 40 c t a +12 5 c 650 na input offset current i os 2.5 25 na ? 40 c t a +125 c 40 na input voltage range v cm C 5 +4 v common - mode rejection cmrr ? 4.9 v v cm +4.0 v, C 40 c t a +125 c 70 110 db large signal voltage gain a vo r l = 2 k , C 4.5 v v out + 4.5 v 35 v/mv r l = 10 k , C 4.5 v v out + 4.5 v 75 120 v/mv ? 40 c t a +125 c 25 v/mv long - term offset voltage 1 v os g g rade 600 v offset voltage drift 2 ? v os / ? t 1 v/ c bias current drift ? i b / ? t 250 pa/ c output characteristics output voltage swing high v oh i l = 250 a, C 40 c t a +125 c 4.95 4.99 v i l = 5 m a 4.85 4.94 v output voltage swing low v ol i l = 250 a, C 40 c t a +125 c C 4.99 C 4.95 v i l = 5 ma C 4.94 C 4.85 v short - circuit current i sc short to g round 80 ma maximum output current i out 30 ma power supply power supply rejection ratio psrr v s = 1.35 v to 6 v, ? 40 c t a +125 c 60 110 db supply current/amplifier i sy op162, v out = 0 v 650 800 a ? 40 c t a +125 c 1.15 ma op262, op462, v out = 0 v 550 775 a ? 40 c t a +125 c 1 ma supply voltage range v s 3.0 (1.5) 12 (6) v dynamic performance slew rate sr ? 4 v < v out < 4 v, r l = 10 k 13 v/ s settling time t s to 0.1%, a v = C 1, v o = 2 v s tep 475 ns gain bandwidth product gbp 15 mhz phase margin m 64 degrees noise performance voltage noise e n p -p 0.1 hz to 10 hz 0.5 v p -p voltage noise density e n f = 1 khz 9.5 nv/ hz current noise density i n f = 1 khz 0.4 pa/ hz 1 long - term offset voltage is guarantee d by a 1000 hour life test performed on three independent lots at +125 c, with an ltpd of 1.3. 2 offset voltage drift is the average of the ?40 c to +25 c del ta and the + 25 c to +125 c delta.
op162/op262/op462 data sheet rev. h | page 6 of 20 absolute maximum ratings table 4. parameter min supply voltage 6 v input voltage 1 6 v differential input voltage 2 0.6 v internal power dissipation soic (s) observe derating curves tssop (ru) observe derating curves output short-circuit duration observe derating curves storage temperature range C65c to +150c operating temperature range C40c to +125c junction temperature range C65c to +150c lead temperature range (soldering, 10 sec) 300c 1 for supply voltages greater than 6 v, th e input voltage is limited to less than or equal to the supply voltage. 2 for differential input voltages greate r than 0.6 v, the input current should be limited to less than 5 ma to prevent degradation or destruction of the input devices. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. table 5. package type ja 1 jc unit 8-lead soic (s) 157 56 c/w 8-lead tssop (ru) 208 c/w 14-lead soic (s) 105 c/w 14-lead tssop (ru) 148 c/w 1 ja is specified for the worst-case conditions, that is, ja is specified for a device soldered in circuit board for soic, and tssop packages . esd caution
data sheet op162/ op262/op462 rev. h | page 7 of 20 typical performance characteristics figure 4 . op462 input offset voltage distribution figure 5 . op462 input offset voltage drift (tcv os ) figure 6 . op462 input bias current vs. common - mode voltage figure 7 . op462 input offset voltage vs. temperature figure 8 . op462 input bias current vs. temperature figure 9 . op462 input offset current vs. temperature v s = 5v t a = 25 c count = 720 op amps input offset voltage ( v) quantity (amplifiers) 250 200 150 50 100 0 ? 200 ? 140 ? 80 ? 20 100 40 160 00288-007 v s = 5v t a = 25c count = 360 op amps input offset drift, tcv os (v,c) quantity (amplifiers) 100 80 60 20 40 0 0.2 0.3 0.5 0.7 0.9 1.3 1.1 1.5 00288-008 common-mode voltage (v) input current (na) 420 340 260 180 100 0 0.5 1.0 1.5 2.0 3.0 2.5 3.5 4.0 00288-009 v s = 5v temperature (c) input offset voltage ( v) 125 100 75 50 25 0 ?75 ?50 ?25 0 25 50 100 75 125 150 00288-010 v s = 5v temperature (c) input bias current (na) 0 ?100 ?200 ?300 ?400 ?500 ?50 ?25 0 25 50 100 75 125 150 00288?011 v s = 5v temperature (c) input offset current (na) 15 10 5 0 ?75 ?50 ?25 0 25 50 100 75 125 150 00288?012 v s = 5v
op162/op262/op462 data sheet rev. h | page 8 of 20 figure 10 . op462 output high voltage vs. temperature figure 11 . op462 output low voltage vs. temperature figure 12 . op462 open - loop gain vs. temperature figure 13 . output low voltage to supply rail vs. load current figure 14 . supply current/amplifier vs. temperature figure 15 . op462 supply current/ amplifier vs. supply voltage temperature (c) output high voltage (v) 5.12 5.06 5.00 4.94 4.88 4.82 ?75 ?50 ?25 0 25 50 100 75 125 150 00288-013 v s = 5v i out = 250a i out = 5ma temperature (c) output low voltage (mv) 0.100 0.080 0.060 0.040 0.020 0.000 ?75 ?50 ?25 0 25 50 100 75 125 150 00288-014 v s = 5v i out = 250a i out = 5ma temperature ( c) open-loop gain (v/mv) 100 80 60 40 20 0 ?75 ?50 ?25 0 25 50 100 75 125 150 00288-015 v s = 5v r l = 10k ? r l = 2k ? r l = 600 ? load current (ma) output low voltage (mv) 100 80 60 40 20 0 0 1 2 3 4 5 6 7 00288-016 v s = 3v v s = 10v temperature (c) supply current (ma) 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 ?75 ?50 ?25 0 25 100 75 125 150 00288-017 v s = 5v v s = 10v v s = 3v supply voltage (v) supply current (ma) 0.7 0.6 0.5 0.4 0 2 4 6 8 10 12 00288-018 t a = 25 c
data sheet op162/ op262/op462 rev. h | page 9 of 20 figure 16 . open - loop gain and phase vs. frequency (no load) figure 17 . closed - loop gain vs. frequency figure 18 . maximum output swing vs. frequency figure 19 . step size vs. settling time figure 20 . small - signal overshoot vs. capacitance figure 21 . voltage noise density vs. frequency frequency (hz) gain (db) 50 40 30 20 10 0 ?10 ?20 ?30 phase shift (db) 45 90 135 180 225 270 100k 1m 10m 100m 00288-019 v s = 5v t a = 25c gain phase frequency (hz) closed-loop gain (db) 60 40 20 0 ? 20 ? 30 10k 100k 1m 10m 100m 00288-020 v s = 5v t a = 25 c r l = 830 ? c l = 5pf frequency (hz) maximum output swing (v p-p) 5 4 3 2 1 0 10k 100k 1m 10m 00288-021 v s = 5v a vcl = 1 r l = 10k ? c l = 15pf t a = 25 c distortion<1% settling time (ns) step size (v) 3 1 ? 1 ? 3 2 4 0 ? 2 ? 4 0 200 400 600 800 1000 00288-022 0.01% 0.1% 0.01% 0.1% v s = 5v t a = 25 c capacitance (pf) overshoot (%) 60 40 50 30 20 10 0 10 100 1000 00288-023 v s = 5v t a = 25 c t a = 50mv r l = 10k ? +os ? os frequency (hz) noise density (nv/ hz) 70 60 50 40 30 10 20 0 1 10 100 1k 00288-024 v s = 5v t a = 25 c
op162/op262/op462 data sheet rev. h | page 10 of 20 figure 22 . current noise density vs. frequency figure 23 . output impedance vs. frequency figure 24 . cmrr vs. frequency figure 25 . psrr vs. frequency figure 26 . 0.1 hz to 10 hz noise figure 27 . no phase reversal (v in = 12 v p - p, v s = 5 v, a v = 1 ) frequency (hz) noise density (pa/ hz) 7 6 5 4 3 1 2 0 1 10 100 1k 00288-025 v s = 5v t a = 25 c frequency (hz) output impedance ( ? ) 300 250 200 150 50 100 0 100k 1m 10m 00288-026 v s = 5v t a = 25 c a vcl = 10 a vcl = 1 frequency (hz) cmrr (db) 90 80 70 60 50 30 40 20 1k 10k 100k 1m 10m 00288-027 v s = 5v t a = 25 c frequency (hz) psrr (db) 90 80 70 60 50 30 40 20 1k 10k 100k 1m 10m 00288-028 v s = 5v t a = 25 c +psrr ? psrr 00288-029 100 90 10 0% v s = 5v a v = 100k ? e n = 0.5v p-p 2s 20mv 10 0% 100 90 00288-030 v in = 12v p-p v s = 5v a v = 1 2v 2v 20 s
data sheet op162/ op262/op462 rev. h | page 11 of 20 figure 28 . small signal transient response figure 29 . large signal transient response 00288-031 10 0% 100 90 200ns 20mv v s = 5v a v = 1 t a = 25 c c l = 100pf 00288-032 10 0% 100 90 100s 500mv v s = 5v a v = 1 t a = 25 c c l = 100pf
op162/op262/op462 data sheet rev. h | page 12 of 20 applications functional descripti on the opx62 family is fabricated using analog devices high speed complementary bipolar process, also called xfcb. th is process trench isolates each transistor to lower parasitic capaci - tances for high speed performance. this high speed process has been implemented w ithout sacrificing the excellent transistor matching and overall dc performance characteristic of analog devi ces complementary bipolar process. this makes the opx62 family an excellent choice as an extremely fast and accurate low voltage op amp. figure 30 shows a simplified e quivalent schematic for the op162 . a pnp differential pair is used at the input of the device. the cross connecting of the emitters lower s the transconductance of the input stage improv ing the slew rate of the device. lowering the transconductance through cross connecting the emitters has another advantage in that it provides a lower noise factor than if emitter degeneration resistors were used. the input stage can function with the base voltages taken all the way to the negative power supply, or up to with in 1 v of the positive power supply. figure 30 . simplified schematic two complementary transistors in a common - emitter configuration are used for the output stage. this allows the output of the device to swing to within 50 m v of either supply rail at load currents less than 1 ma. as load current increases, the maximum voltage swing of the output decrease s . this is due to the collector - to - emitter saturation voltages of the output transistors increasing. the gain of the output stage , and conse - quently the open - loop gain of the amplifier, is dependent on the load resistance connected at the output. b ecause the dominant pole frequency is inversely proportional to the open - loop gain, the unity - gain bandwidth of the device is not affecte d by the load resistance. this is typically the case in rail - to - rail output devices. offset adjustment b ecause the op162/op262/op462 have an exceptionally low typical offset voltage, adjustment to correct offset voltage may not be needed. however, the op1 62 has pinouts to attach a nulling resistor. figure 31 shows how the op162 offset voltage can be adjusted by connecting a potentiometer between pin 1 and pin 8, and connecting the wiper to v cc . it is i mportant to avoid accidentally connecting the wiper to v ee , as this can damage the device. the recommended value for the potentiometer is 20 k?. figure 31 . offset adjustment schematic rail - t o - r ail output the op162/op262/op462 ha ve a wide output voltage range that extends to within 60 mv of each supply rail with a load c urrent of 5 ma. decreasing the load current extends the output voltage range even closer to the supply rails. the common - mode in put range ext ends from ground to within 1 v of the positive supply. it is recommended that there be some minimal amount of gain when a rail - to - rail output swing is desired. the minimum gain required is based on the supply voltage and can be fo und as 1 ? = s s v,min v v a where v s is the positiv e supply voltage. with a single - supply voltage of 5 v, the minimum gain to achieve rail - to - rail output should be 1.25. output short - circuit protection to achieve a wide bandwidth and high slew rate, the output of the op162/op262/op462 are not short - circuit protected. shorting the output directly to ground or to a supply rail may destroy the device. the typical maximum safe output current is 30 ma. steps should be taken to ensure the output of the device will not be f orced to source or sink more than 30 ma. in applications where some output current protection is needed, but not at the expense of reduced output voltage headroom, a low value resistor in series with the output can be used. this is shown in figure 32 . the resistor is connected within the feed - back loop of the amplifier so that if v out is shorted to ground v cc v ee +in ? in v out 00288-033 ?5v 20k? op162 +5v v os 3 2 4 7 8 1 6 00288-034
data sheet op162/ op262/op462 rev. h | page 13 of 20 and v in swings up to 5 v, the output current will not exceed 30 ma. for single 5 v supply applications, resistors less than 169 ? are not recommended. figure 32 . output short - circuit protection input overvoltage pr otection the input voltage should be limited to 6 v , or damage to the device can occur. electrostatic protection diodes placed in the input stage of the device help protect the amplifier from static discharge. diodes are connected between each input as well as from each input to both supply pins as shown in the simplified equivalen t circuit in figure 30 . if an input voltage exceeds either supply voltage by more than 0.6 v, or if the differential input voltage is greater than 0.6 v, these diodes en ergize causing overvoltage damage. the input current should be limited to less than 5 ma to prevent degradation or destruction of the device by placing an external resistor in series with the input at risk of being overdriven . the size of the resistor can be calculated by dividing the maxi - mum input voltage by 5 ma. for example, if the differential input voltage could reach 5 v, the external resistor should be 5 v/5 ma = 1 k ?. in p ractice, this resist or should be placed in series with both inputs to balance any offset voltages created by the input bias current. output phase reversa l the op162/op262/op462 are immune to phase reversal as long as the input voltage is limited to 6 v. figure 27 shows the output of a device with the input voltage driven beyond the supply voltages. a lthough the devices output does not change phase, large currents due to input overvoltage could result, damaging the device. in applications where the possibility of an input voltage exceeding the supply voltage exists, overvoltage protection should be used, as described in the previous section. power dissipation the maximum power that can be safely dissipa ted by the op162/op262/op462 is limited by the associated rise in junction temperature. the maximum safe junction temperature is 1 50c ; device performance suffer s when this limit is exceeded . if this maximum is only momentarily exceeded, proper circuit ope ration will be restored as soon as the die temperature is reduced. leaving the device in an overheated condition for an extended period can result in permanent damage to the device. to calculate the internal junction temperature of the opx62, use the fo rmula t j = p diss ja + t a where: t j is the opx 62 junction temperature. p diss is the opx 62 power dissipation. ja is the opx62 package thermal resistance, junction - to - ambient temperature. t a is the a mbient temperature of the circuit. the power dissipated by the device can be calculated as p dis s = i load ( v s C v out ) where: i load i s the opx 62 output load current. v s is the opx 62 supply voltage. v out is t he opx62 output voltage. figure 33 and figure 34 provide a convenient way to determine if the device is being overheated. the maximum safe power dissipation can be found graphically, based on the package type and the ambient temperature around the package. by using the previous equation, it is a simple matter to see if p diss exceeds the d e v ices power derating curve. to ensure proper operation, it is important to obs erve the recommended derating curves shown in figure 33 and figure 34. figure 33 . maximum power dissipation vs. temperature for 8- lead package types opx62 v in v out 169 ? 5v 00288-035 ambient temperature (c) maximum power dissipation (watts) 0.9 0.7 0.8 0.5 0.6 0.1 0.2 0.3 0.4 0 20 40 60 100 80 120 00288-036 8-lead soic 8-lead msop 8-lead tssop
op162/op262/op462 data sheet rev. h | page 14 of 20 figure 34 . maximum power dissipation vs. temperature for 14 - lead package types unused amplifiers it is recommended that any unused amplifiers in a dual or a quad package be configured as a unity - gain follower with a 1 k? fe edback resistor connected from the inverting input to the output , and the noninverting input tied to the ground plane. power - on settling time the time it tak es for the output of an op amp to settle after a supply voltage is delivered can be an important consideration in some power - up - sensitive applications. an example of this would be in an a/d converter where the time until valid data can be produced after po wer - up is important. the opx62 family has a rapid settling time after power - up. figure 35 shows the op462 output settling times for a single - supply voltage of v s = + 5 v. the test circuit in figure 36 was used to find the power - on settling times for the device. figure 35 . oscilloscope photo of v s and v out figure 36 . test circuit for power - on settling time capacitive load driv e the op162/op262/op462 are high speed, extremely accurate device s that tolerate some capacitive loading at their output s. a s load capacitance increases, unity - gain bandwidth of an opx62 device decrease s . th is also causes an increase in overshoot and settlin g time for the output. figure 38 shows an example of this with the device configured for unity gain and driving a 10 k ? resistor and 300 pf capacitor placed in parallel. by connecting a series r - c network, commonly called a snubber network, from the output of the device to ground, this ringing can be eliminated and overshoot can be significantly reduced. figure 37 shows how to set up the snubber network, and figure 39 shows the improvement in output response with the network added. figure 37 . snubber network compensation for capacitive loads figure 38 . a photo of a ringing square wave ambient temperature ( c ) maximum power dissipation (watts) 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 0.1 0.2 0 20 45 70 95 120 00288-037 14-lead soic 14-lead tssop 10 0% 100 90 5 0 0 n s 2 v 5 0 m v v s = 5v a v = 1 r l = 10k ? 00288-038 op462 v out 0 to +5v square 10k ? 00288-039 1 opx62 v in v out r x c x c l 5v 00288-040 00288-041 50mv 1s 100 90 10 0% v s = 5v a v = 1 c l = 300pf r l = 10k ?
data sheet op162/ op262/op462 rev. h | page 15 of 20 figure 39 . a photo of a nice square wave at the output the network operates in parallel with the load capacitor, c l , and provides compensation for the added phase lag. the actual values of the network resistor and capacitor are empirically determined to minimize overshoot and maximiz e unity - gain bandwidth. table 6 shows a few sample snubber networks for large load capacitors. table 6 . snubber networks for large capacitive loads c load r x c x < 300 pf 140 10 nf 500 pf 100 10 nf 1 nf 80 10 nf 10 nf 10 47 nf h igher load capacitance will reduce the unity - gain bandwidth of the device. figure 40 shows unity - gain bandwidth v s. capacitive load. the snubber network does not provide any in crease in bandwidth, but it substantially reduce s ringing and overshoot, as shown between figure 38 and figure 39. figure 40 . unity - gain bandwi dth vs. c load total harmonic disto rtion and crosstalk the opx62 device family offers low total harmonic distortion making it an excellent choice for audio applications. figure 41 shows a graph of thd plus noise figures at 0.001% for the op462. figure 42 shows the worst case crosstalk between two amplifiers in the op462. a 1 v rms signal is applied to one amplifier while measuring the output of an adjacent amplifier. both amplifiers are config ured for unity gain and supplied wit h 2.5 v. figure 41 . thd + n vs. frequency figure 42 . crosstalk vs. frequency pcb layout considera tions because the op162/op262/op462 can provide gain s at high freque ncy, careful attention to board layout and component selection is recommended. as with any high speed application, a good ground plane is essential to achieve the optimum performance. this can significantly reduce the undesirable effects of ground loops an d i r losses by providing a low impedance reference point. best results are obtained with a multilayer board design with one layer assigned to ground plane. use c hip capacitors for supply bypassing, with one end of the capacitor connected to the ground plane and the other end connected within 1/8 inch of each power pin. an additional large tantalum electrolytic capacitor (4.7 f to 10 f) should be connected in parallel. this capacitor provide s current for fast , large - signal changes at the devices outpu t ; therefore, it does not need to be placed as close to the supply pins . 00288-042 10 0% 100 90 50mv 1s v s = 5v a v = 1 c l = 300pf r l = 10k ? ? 00288-043 frequency (hz) thd+n (%) 0.010 0.001 0.0001 20 100 1k 10k 20k 00288-044 v s = ? 00288-045 ? ?
op162/op262/op462 data sheet rev. h | page 16 of 20 applications circuits single - supply stereo headphone driver figure 43 shows a stereo headphone output amplifier that can operate from a single 5 v supply. the reference voltage is derived by dividing the supply voltage down with two 100 k ? resistors. a 10 f cap acitor prevents power supply noise from contaminating the audio signal and establishes an ac ground for the volume control potentiometers. the audio signal is ac - coupled to each noninverting input through a 10 f capacitor. the gain of the amplifier is con - trolled b y the feedback resistors and is (r2/r1) + 1. for this example, the gain is 6. by removing r1, the amplifier would have unity gain. t o short - circuit protect the output of the device , a 169 ? resistor is placed at the output in the feedback network . this prevent s any damage to the device if the head - phone output beco me s shorted. a 270 f capacitor is used at the output to couple the amplifier to the headphone. this value is much larger than that used for the input because of the low impedance of hea dphones, which can range from 32 ? to 600 ? or more. figure 43 . headphone output amplifier instrumentation ampl ifier because of their high speed, low offset voltages , and low noise characteristics, the op162/op262/op462 can be u sed in a wide variety of high speed applications, including precision instru - mentation amplifiers. figure 44 shows an example of such an application. figure 44 . high speed instrumentation amplifier the differential gain of the cir cuit is determined by r g , where g diff r a 2 1 + = with the r g resistor value in k ? . r emoving r g set s the circuit gain to unity. the fourth op amp, op462 - d, is optional and is used to improve cmrr by reducing any input capacitance to the amplifier. by shielding the input signal leads and driving the shield with the common - mode voltage, input capacitance is eliminated at common - mode voltages. this voltage is derived from the midpoint of the outputs of op462 - a and op462 - b by using two 10 k? re sistors followed by op462 - d as a unity - gain buffer. it is important to use 1% or better tolerance components for the 2 k? resistors , as the common - mode rejection is dependent on their ratios being exact. a potentiometer should also be connected in series with the op462 - c noninverting input resistor to ground t o optimize common - mode rejection. the circuit in figure 44 was implemented to test its settling time. the instrumentation amp was powered wit h ?5 v , so the input step vo ltage went from ? 5 v to + 4 v to keep the op462 within its input range. therefore, the 0.05% settling range is when the output is within 4.5 mv. figure 45 shows the posi tive slope settling time to be 1 .8 s, and figure 46 shows a settling time of 3. 9 s for the negative slope. op262-a 5v 169 ? 270 f 47k ? l volume control r1 = 10k ? 10 f 1 0 f 10k ? 5v 100k ? 10 f 100k ? r2 = 50k ? left in op262-b 5v 169 ? 270 f 47k ? headphone right headphone left 10k ? r volume control 1 0 f right in r2 = 50k ? 10 f r1 = 10k ? 00288-046 op462-a op462-b op462-c op462-d ? v in +v in 1k ? 10k ? 2k ? 1.9k ? 200 ? 10 turn (optional) output r g 1k ? 10k ? 2k ? 2k ? 00288-047
data sheet op162/ op262/op462 rev. h | page 17 of 20 figure 45 . positive slope settling time figure 46 . negative slope settling time direct access arrang ement figure 47 shows a schematic for a 5 v single - supply transmit / receive telephone line inte rface for 600 ? trans mission systems. it allows full - duplex transmission of signals on a transformer - coupled 6 00 ? line. amplifier a1 provides gain that can be adjusted to meet the modem output drive requirements. both a1 and a 2 are configured to apply the largest possible differential signal to the transformer. the largest signal available on a single 5 v supply is approximately 4.0 v p - p into a 600 ? transmission system. amplifier a3 is configured as a difference amplifier to extract the receive information from the transmission line for amplification by a4. a3 also prevents the transmit signal from interfering with the receive signal. the gain of a4 can be adjusted in the sam e manner as a1 to meet the modems input signal requ irements. standard resistor values permit the use of sip ( s ingle i n - line p ackage) format resistor arrays. couple this with the op462 14 - lead soic or tssop package and this circuit offer s a compact solution. figure 47 . single - supply direct access arrangement for modems 00288-048 10 0% 100 90 1s 5mv 2v 00288-049 10 0% 100 90 10 0% 100 90 1s 2v 5mv 6.2v 6.2v transmit txa receive rxa 2k p1 tx gain adjust a1 a2 a3 a4 a1, a2 = 1/2 ad8532 a3, a4 = 1/2 ad8532 r3 360 ? z o 600 ? r1 10k ? r13 10k ? r10 10k ? r9 10k ? r11 10k ? c2 0.1 f c1 0.1 f 10 f r12 10k ? r7 10k ? r8 10k ? r5 10k ? r6 10k ? r14 14.3k ? r2 9.09k ? 1:1 t1 to telephone line 1 2 3 7 6 5 2 3 1 6 5 7 p2 rx gain adjust 2k ? 5v dc midcom 671-8005 00288-050
op162/op262/op462 data sheet rev. h | page 18 of 20 outline dimensions figure 48 . 8 - lead standard small outline package [soic _n ] narrow body s - suffix (r - 8) dimensions shown in millimeters a nd (inches) figure 49 . 8 - lead thin shrink small outline package [tssop) (ru - 8) dimensions shown in millimeters con tr ol lin g dim ens ions are in milli meter s; inch dimen sions (in p arent heses ) are round ed-of f milli meter equiv alent s for refer ence onl y and ar e not app rop ria te for use in desig n. compl iant t o jedec st andar ds ms-01 2-aa 0124 07-a 0.25 (0.00 98) 0.17 (0.00 67) 1.27 (0.05 00) 0.40 (0.01 57) 0.50 (0.01 96) 0.25 (0.00 99) 45 8 0 1.75 (0.06 88) 1.35 (0.05 32) sea ting plane 0. 25 (0 .0 09 8) 0. 10 (0 .0 040 ) 4 1 8 5 5.00 (0.19 68) 4.80 (0.18 90) 4.00 (0.15 74) 3.80 (0.1 497) 1.27 (0.05 00) bsc 6.20 (0.24 41) 5.80 (0.22 84) 0.51 (0.02 01) 0.31 (0.01 22) copla narit y 0.10 8 5 4 1 pin 1 0.65 bsc seating plane 0.15 0.05 0.30 0.19 1.20 max 0.20 0.09 8 0 6.40 bsc 4.50 4.40 4.30 3.10 3.00 2.90 coplanarity 0.10 0.75 0.60 0.45 compliant to jedec standards mo-153-aa
data sheet op162/ op262/op462 rev. h | page 19 of 20 figure 50 . 14 - lead thin shrink small outline package [tssop] (ru - 14) dimensions shown in millimeters figure 51 . 14 - lead standard small outline package [soic _n ] narrow body s - suffix (r - 14) dimensions shown in millimeters and (inches) compliant to jedec standards mo-153-ab-1 061908-a 8 0 4.50 4.40 4.30 14 8 7 1 6.40 bsc pin 1 5.10 5.00 4.90 0.65 bsc 0.15 0.05 0.30 0.19 1.20 max 1.05 1.00 0.80 0.20 0.09 0.75 0.60 0.45 coplanarity 0.10 se a ting plane controlling dimensions are in millimeters; inch dimensions (in p arentheses) are rounded-off millimeter equi v alents for reference on l y and are not appropri a te for use in design. compliant t o jedec s t andards ms-012-ab 060606- a 14 8 7 1 6.20 (0.2441) 5.80 (0.2283) 4.00 (0.1575) 3.80 (0.1496) 8.75 (0.3445) 8.55 (0.3366) 1.27 (0.0500) bsc sea ting plane 0.25 (0.0098) 0.10 (0.0039) 0.51 (0.0201) 0.31 (0.0122) 1.75 (0.0689) 1.35 (0.0531) 0.50 (0.0197) 0.25 (0.0098) 1.27 (0.0500) 0.40 (0.0157) 0.25 (0.0098) 0.17 (0.0067) coplanarit y 0.10 8 0 45
op162/op262/op462 data sheet rev. h | page 20 of 20 ordering guide model 1 temperature range package description package option op162gsz ?40c to +125c 8-lead soic_n s-suffix (r-8) op162gsz-reel ?40c to +125c 8-lead soic_n s-suffix (r-8) op162gsz-reel7 ?40c to +125c 8-lead soic_n s-suffix (r-8) op262druz-reel ?40c to +125c 8-lead tssop ru-8 op262gs ?40c to +125c 8-lead soic_n s-suffix (r-8) op262gs-reel ?40c to +125c 8-lead soic_n s-suffix (r-8) op262gs-reel7 ?40c to +125c 8-lead soic_ s-suffix (r-8) op262gsz ?40c to +125c 8-lead soic_n s-suffix (r-8) op262gsz-reel ?40c to +125c 8-lead soic_n s-suffix (r-8) op262gsz-reel7 ?40c to +125c 8-lead soic_n s-suffix (r-8) op262hru-reel ?40c to +125c 8-lead tssop ru-8 op262hruz ?40c to +125c 8-lead tssop ru-8 op262hruz-reel ?40c to +125c 8-lead tssop ru-8 op462gs ?40c to +125c 14-lead soic_ s-suffix (r-14) op462gs-reel ?40c to +125c 14-lead soic_n s-suffix (r-14) op462gs-reel7 ?40c to +125c 14-lead soic_n s-suffix (r-14) op462gsz ?40c to +125c 14-lead soic_n s-suffix (r-14) op462gsz-reel ?40c to +125c 14-lead soic_n s-suffix (r-14) op462gsz-reel7 ?40c to +125c 14-lead soic_n s-suffix (r-14) op462hru-reel ?40c to +125c 14-lead tssop ru-14 op462hruz-reel ?40c to +125c 14-lead tssop ru-14 1 z = rohs compliant part. ?2013 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d00288-0-4/13(h)

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